An array substrate is an important member of a liquid crystal display panel, an organic light emitting diode (OLED) display panel and the like. The array substrate comprises a display region for displaying. Structures for displaying, such as gate lines, data lines, thin film transistors, and pixel electrodes (or organic light emitting diodes), are provided in the display region. In order to perform displaying, lead wires (gate lines, data lines, etc.) in the display region must be electrically connected with a driver integrated circuit (IC). There are various connection modes of the driver IC. For example, a tape carrier package (TCP) mode is that the driver IC is manufactured as a package tape and the package tape is provided at a lateral part of the array substrate; a chip on board (COB) mode is that the driver IC is provided on a printed circuit board (PCB) and the PCB is connected to a lateral part of the array substrate; a chip on film (COF) mode is that the driver IC is provided on a flexible printed circuit board (FPC) and the FPC is connected to a lateral part of the array substrate; and a chip on glass (COG) mode is that the driver IC is directly provided on the array substrate.
In order to avoid influence on displaying, the driver IC, the printed circuit board and the like cannot be directly connected to the lead wires in the display region. Thus, as shown in FIGS. 1 and 2, a periphery region 91 is provided outside a display region 92 on a base 11 of an array substrate 1, and lead wires 2 extend from the display region 92 to the periphery region 91 so as to connect with a driver IC (or a printed circuit board, etc.) 82. Generally, after entering into the periphery region 91 from the display region 92, the lead wires 2 first fan out, that is, the lead wires 2 gradually concentrate to have pitches which are matched with pitches of ports of the driver IC 82, and pads 3 for connecting with the driver IC 82, a printed circuit board and the like are provided at ends of the fan-out lead wires 2.
The inventor founds that there are following technical problems in the prior art.
First, the lead wires 2 complete fanning out in the periphery region 91, and structures such as pads 3 are also provided in the periphery region 91, thus width of the periphery region 91 must be large enough, but the periphery region 91 further needs to be packaged by a frame, resulting that dimension of the frame of the display panel is too large, and it is difficult to realize a narrow frame.
Moreover, as shown in FIG. 2, a certain space above the pads 3 should be reserved for connecting the driver IC 82, a printed circuit board and the like, thus a substrate (for example, a color filter substrate or a package substrate) 81 for aligning with the array substrate 1 to form a cell cannot cover the region where the pads 3 are provided, and the substrate 81 must be smaller than the array substrate 1. Dimensions of the substrate 81 and the array substrate 1 are different from each other, which results that cutting for the substrate 81 and cutting for the array substrate 1 must be performed separately, and the cutting process is complex.
In addition, when a plurality of display panels are spliced for use (i.e., when a plurality of display panels are used for consisting a large screen), since edges of the substrate 81 and the array substrate 1 are not aligned with each other, a frame should be provided outside thereof so as to splice, which leads to a complex structure and too large gaps between adjacent display panels, thus effect of splicing is poor.